Mainline:Broadcom Kona/BCM590xx/Interrupts: Difference between revisions
Created page with "The BCM590xx PMIC exposes a series of interrupts. This page describes the operation of these interrupts. == Interrupt overview == The BCM59054 has '''128 IRQs'''; the BCM59056 has '''64 IRQs'''. On both chips, interrupt handling is the same. === Interrupt masking === Interrupts can be masked/unmasked by writing the relevant bit to <code>INTxMSK</code> registers. A value of <code>0</code> indicates that the interrupt is masked; a value of <code>1</code> indicates that..." |
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Revision as of 20:30, 31 January 2025
The BCM590xx PMIC exposes a series of interrupts. This page describes the operation of these interrupts.
Interrupt overview
The BCM59054 has 128 IRQs; the BCM59056 has 64 IRQs. On both chips, interrupt handling is the same.
Interrupt masking
Interrupts can be masked/unmasked by writing the relevant bit to INTxMSK registers. A value of 0 indicates that the interrupt is masked; a value of 1 indicates that the interrupt is unmasked.
Checking the status of an interrupt
Interrupts report their status in INTx registers.
List of interrupts
TODO. See enum bcmpmu59xxx_irq in include/linux/mfd/bcmpmu59xxx.h in downstream for BCM59054 interrupts, enum bcmpmu_irq in include/linux/mfd/bcmpmu_56.h for BCM59056 interrupts.
See also
- Relevant downstream drivers: drivers/mfd/bcmpmu59xxx-irq.c/drivers/mfd/bcmpmu-i2c-56.c, some bits in drivers/mfd/bcm590xx-core.c (BCM59055) may also be relevant
- IRQ lists are stored in the main headers: include/linux/mfd/bcmpmu59xxx.h/include/linux/mfd/bcmpmu_56.h