Mainline:Broadcom Kona/Timers: Difference between revisions

Line 53:

== Starting the counter ==

To set the value and start counting:

* Set the value of <code>KONA_GPTIMER_STCM{n}</code> to the 32-bit value to match for (<code>{n}</code> is the number of the channel)

* Wait for the value to sync by watching the <code>STCM{n}_SYNC</code> value in <code>KONA_GPTIMER_STCS</code>

* In STCS, all in one write:

** Clear the timer match field (bits 3..0)

** Write the timer match bit for the selected channel (bits 3..0)

** Write the compare enable bit for the selected channel (bits 7..4)

== Local tick timer ==

Line 71:

Line 81:

| <code>STCS_TIMER_MATCH</code>

| 3:0

| ~~Timer match interrupt. When~~ the ~~match registers STCM{0,3} match the counter,~~ the interrupt for ~~the matching~~ channel ~~is raised and the corresponding bit (0 for channel 0, 1 for channel 1, etc.) is set to~~ <code>0</code>~~. Setting~~ the ~~bit to~~ <code>1</code> ~~clears~~ the interrupt~~; setting~~ the bit to <code>0</code> ~~keeps it as-is~~.~~ (TODO: does this mean that 1 is "interrupt off" and 0 is "interrupt on"?)~~

| Represents the state of the timer interrupt for each channel; <code>0</code> means the interrupt is enabled, <code>1</code> means the interrupt is cleared. To clean the interrupt, clean the entire field and set the bit corresponding to the channel to clear the interrupt for to <code>1</code>.

|-

| <code>STCS_COMPARE_ENABLE</code>

| 7:4

| Enable compare (match) on the specified channel(s). When this bit is set, the value of the STCM{0,3} register will be used for a match. - <code>0b0001</code> - enable compare for channel 0 - <code>0b0010</code> - enable compare for channel 1 - <code>0b0100</code> - enable compare for channel 2 - <code>0b1000</code> - enable compare for channel 3

| Enable compare (match) on the specified channel(s). When this bit is set for a channel, the value of the STCM{0,3} register will be used for a match. - <code>0b0001</code> - enable compare for channel 0 - <code>0b0010</code> - enable compare for channel 1 - <code>0b0100</code> - enable compare for channel 2 - <code>0b1000</code> - enable compare for channel 3

|-

| <code>STCS_COMPARE_ENABLE_SYNC</code>

@@ Line 53: / Line 53: @@
 == Starting the counter ==
+To set the value and start counting:
+* Set the value of <code>KONA_GPTIMER_STCM{n}</code> to the 32-bit value to match for (<code>{n}</code> is the number of the channel)
+* Wait for the value to sync by watching the <code>STCM{n}_SYNC</code> value in <code>KONA_GPTIMER_STCS</code>
+* In STCS, all in one write:
+** Clear the timer match field (bits 3..0)
+** Write the timer match bit for the selected channel (bits 3..0)
+** Write the compare enable bit for the selected channel (bits 7..4)
 == Local tick timer ==
@@ Line 71: / Line 81: @@
 | <code>STCS_TIMER_MATCH</code>
 | 3:0
-| Timer match interrupt. When the match registers STCM{0,3} match the counter, the interrupt for the matching channel is raised and the corresponding bit (0 for channel 0, 1 for channel 1, etc.) is set to <code>0</code>. Setting the bit to <code>1</code> clears the interrupt; setting the bit to <code>0</code> keeps it as-is.<br><br>(TODO: does this mean that 1 is "interrupt off" and 0 is "interrupt on"?)
+| Represents the state of the timer interrupt for each channel; <code>0</code> means the interrupt is enabled, <code>1</code> means the interrupt is cleared.<br><br>To clean the interrupt, clean the entire field and set the bit corresponding to the channel to clear the interrupt for to <code>1</code>.
 |-
 | <code>STCS_COMPARE_ENABLE</code>
 | 7:4
-| Enable compare (match) on the specified channel(s). When this bit is set, the value of the STCM{0,3} register will be used for a match.<br><br>- <code>0b0001</code> - enable compare for channel 0<br>- <code>0b0010</code> - enable compare for channel 1<br>- <code>0b0100</code> - enable compare for channel 2<br>- <code>0b1000</code> - enable compare for channel 3
+| Enable compare (match) on the specified channel(s). When this bit is set for a channel, the value of the STCM{0,3} register will be used for a match.<br><br>- <code>0b0001</code> - enable compare for channel 0<br>- <code>0b0010</code> - enable compare for channel 1<br>- <code>0b0100</code> - enable compare for channel 2<br>- <code>0b1000</code> - enable compare for channel 3
 |-
 | <code>STCS_COMPARE_ENABLE_SYNC</code>