Mainline:Broadcom Kona/Timers: Difference between revisions

fixup formatting on register names
fix timer_match desc - downstream code and decompiled loader both clear all 4 bits of timer_match before writing 1 to disarm the one interrupt they want to disarm
Line 71: Line 71:
| <code>STCS_TIMER_MATCH</code>
| <code>STCS_TIMER_MATCH</code>
| 3:0
| 3:0
| When the match registers STCM{0,3} match the counter, the interrupt for the matching channel is raised and a bit corresponding to the channel is set in this register.<br><br>- <code>0b0001</code> - channel 0 matches<br>- <code>0b0010</code> - channel 1 matches<br>- <code>0b0100</code> - channel 2 matches<br>- <code>0b1000</code> - channel 3 matches
| Timer match interrupt. When the match registers STCM{0,3} match the counter, the interrupt for the matching channel is raised and the corresponding bit (0 for channel 0, 1 for channel 1, etc.) is set to <code>0</code>. Setting the bit to <code>1</code> clears the interrupt; setting the bit to <code>0</code> keeps it as-is.<br><br>(TODO: does this mean that 1 is "interrupt off" and 0 is "interrupt on"?)
|-
|-
| <code>STCS_COMPARE_ENABLE</code>
| <code>STCS_COMPARE_ENABLE</code>