Mainline:Broadcom Kona/Clocks: Difference between revisions
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* Figure out how voltage and peripheral voltage settings work, and what they affect | * Figure out how voltage and peripheral voltage settings work, and what they affect | ||
* Document connection to the power/PI manager | * Document connection to the power/PI manager | ||
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The above is more or less abridged from the mainline driver's docs: | The above is more or less abridged from the mainline driver's docs: | ||
< | <syntaxhighlight lang="c"> /* | ||
* If it's a synchronous request, we'll wait for the voltage | * If it's a synchronous request, we'll wait for the voltage | ||
* and frequency of the active load to stabilize before | * and frequency of the active load to stabilize before | ||
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* | * | ||
* Note, we do NOT read-modify-write this register. | * Note, we do NOT read-modify-write this register. | ||
*/ </ | */ </syntaxhighlight> | ||
and is somewhat related to downstream's <code>ccu_set_policy_ctrl</code>. | and is somewhat related to downstream's <code>ccu_set_policy_ctrl</code>. | ||
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Effectively, a frequency table looks sort of like this (written in a simplified, Python-like syntax for easier understanding): | Effectively, a frequency table looks sort of like this (written in a simplified, Python-like syntax for easier understanding): | ||
< | <syntaxhighlight lang="python">ccu_freq_list0 = [26000000,26000000,26000000,26000000] | ||
ccu_freq_list1 = [52000000,52000000,52000000,5200000] | ccu_freq_list1 = [52000000,52000000,52000000,5200000] | ||
... | ... | ||
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ccu_freq_list0, ccu_freq_list1, ..., ccu_freq_list6 | ccu_freq_list0, ccu_freq_list1, ..., ccu_freq_list6 | ||
] | ] | ||
# actual number of frequencies in table is specific to each CCU</ | # actual number of frequencies in table is specific to each CCU</syntaxhighlight> | ||
This is used by bus clocks - which frequencies correspond to which clocks is shown by the <code>.freq_tbl_index</code> member of the clock info struct. Clocks that have this value set to >= 0 specify that they're connected to that specific frequency; clocks with a value of -1 use a source clock or internal dividers instead. | This is used by bus clocks - which frequencies correspond to which clocks is shown by the <code>.freq_tbl_index</code> member of the clock info struct. Clocks that have this value set to >= 0 specify that they're connected to that specific frequency; clocks with a value of -1 use a source clock or internal dividers instead. | ||
< | <syntaxhighlight lang="python"># A bus clock will perform an operation like so: | ||
current_policy = ccu.get_active_policy() # CCU policy ID, from 0 to 3 | current_policy = ccu.get_active_policy() # CCU policy ID, from 0 to 3 | ||
freq_id = ccu.get_freq_policy(current_policy) # read frequency ID (aka which table to use) for the current policy | freq_id = ccu.get_freq_policy(current_policy) # read frequency ID (aka which table to use) for the current policy | ||
ccu.freq_table[freq_id][bus_clk.freq_tbl_index]</ | ccu.freq_table[freq_id][bus_clk.freq_tbl_index]</syntaxhighlight> | ||
=== Core clocks and freq policy === | === Core clocks and freq policy === | ||
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* Every PI also has its own OPPs which get converted to CCU frequency IDs as per the <code>.opp_info</code> tables | * Every PI also has its own OPPs which get converted to CCU frequency IDs as per the <code>.opp_info</code> tables | ||
* PI reset offsets are located in the root CCU | * PI reset offsets are located in the root CCU | ||
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* <code>.trig</code>: <code>TRIGGER()</code>, in order: <code>.clk_div.div_trig_offset</code>, <code>.div_trig_mask</code> (->bit) | * <code>.trig</code>: <code>TRIGGER()</code>, in order: <code>.clk_div.div_trig_offset</code>, <code>.div_trig_mask</code> (->bit) | ||
* <code>.policy</code>: <code>POLICY()</code>, in order: the CCU's <code>policy_mask{1/2}_offset</code> (depending on <code>.mask_set</code>), <code>.policy_bit_mask</code> (->bit) | * <code>.policy</code>: <code>POLICY()</code>, in order: the CCU's <code>policy_mask{1/2}_offset</code> (depending on <code>.mask_set</code>), <code>.policy_bit_mask</code> (->bit) | ||
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TPIU is some CoreSight thing. PTI is likely MIPS PTI (''Parallel Trace Interface''). | TPIU is some CoreSight thing. PTI is likely MIPS PTI (''Parallel Trace Interface''). | ||