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Mainline:Broadcom Kona/Pin control (PADCTRL): Difference between revisions

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Created page with "The pin controller in the BCM21664/BCM23550 appears to be ''somewhat'' similar to BCM28155, judging by the mainline driver. * BCM21664 has '''155''' pins; each pin can also have '''6''' functions. * BCM28155 has '''268''' pins; each pin can also have '''4''' functions. The downstream pinmux driver is located at <code>arch/arm/plat-kona/pinmux.c</code>, with per-platform settings defined in <code>arch/arm/mach-{codename}/{codename}_pinmux.c</code>. These files also cont..."
 
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* BCM28155 has '''268''' pins; each pin can also have '''4''' functions.
* BCM28155 has '''268''' pins; each pin can also have '''4''' functions.


The downstream pinmux driver is located at <code>arch/arm/plat-kona/pinmux.c</code>, with per-platform settings defined in <code>arch/arm/mach-{codename}/{codename}_pinmux.c</code>. These files also contain the init function <code>pinmux_chip_init()</code>, which on Java and Hawaii does two things: * unlocks the pinmux * allocates the memory for the pinmux driver to use
The downstream pinmux driver is located at <code>arch/arm/plat-kona/pinmux.c</code>, with per-platform settings defined in <code>arch/arm/mach-{codename}/{codename}_pinmux.c</code>. These files also contain the init function <code>pinmux_chip_init()</code>, which on Java and Hawaii does two things:
 
* unlocks the pinmux
* allocates the memory for the pinmux driver to use


The pin controller/pinmux API, as well as a general explaination of how a pin controller works, can be found in the kernel documentation here: https://www.kernel.org/doc/html/latest/driver-api/pin-control.html (ah, if every component had a piece of docs like this...)
The pin controller/pinmux API, as well as a general explaination of how a pin controller works, can be found in the kernel documentation here: https://www.kernel.org/doc/html/latest/driver-api/pin-control.html (ah, if every component had a piece of docs like this...)
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== Pin description ==
== Pin description ==


There are two ways in whicn pins are described in the downstream kernel (<code>arch/arm/mach-{codename}/{codename}_pinmux.c</code>): * using PIN_CFG and PIN_BSC_CFG, as seen in rhea. * using a custom <code>PIN_DESC</code> shorthand, as seen in hawaii/java; this wraps around <code>PIN_CFG</code>.
There are two ways in whicn pins are described in the downstream kernel (<code>arch/arm/mach-{codename}/{codename}_pinmux.c</code>):
 
* using PIN_CFG and PIN_BSC_CFG, as seen in rhea.
* using a custom <code>PIN_DESC</code> shorthand, as seen in hawaii/java; this wraps around <code>PIN_CFG</code>.


== Pins ==
== Pins ==
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== Functions ==
== Functions ==


Each pin can have 6 alternative functions. The names (and thus numbers) for these are defined separately in the downstream drivers. They cover a lot more cases than just the base pins, including things like every GPIO. (This is a fairly standard pin muxing setup.)
Each pin can have 4 (BCM28155) or 6 (BCM2166x) alternative functions. The names (and thus numbers) for these are defined separately in the downstream drivers. They cover a lot more cases than just the base pins, including things like every GPIO. (This is a fairly standard pin muxing setup.)
 
The currently selected function is saved to the '''pinsel''' register, which represents the currently selected function in 3 bits. Which bit belongs to which function is described in <code>arch/arm/mach-{codename}/{codename}_pinmux.c</code>.


The currently selected function is saved to the '''selector''' register, which represents the currently selected function in 3 bits. Which bit belongs to which function is described in <code>arch/arm/mach-{codename}/{codename}_pinmux.c</code>.
* [[/BCM21664 pins]]

Latest revision as of 15:31, 7 February 2025

The pin controller in the BCM21664/BCM23550 appears to be somewhat similar to BCM28155, judging by the mainline driver.

  • BCM21664 has 155 pins; each pin can also have 6 functions.
  • BCM28155 has 268 pins; each pin can also have 4 functions.

The downstream pinmux driver is located at arch/arm/plat-kona/pinmux.c, with per-platform settings defined in arch/arm/mach-{codename}/{codename}_pinmux.c. These files also contain the init function pinmux_chip_init(), which on Java and Hawaii does two things:

  • unlocks the pinmux
  • allocates the memory for the pinmux driver to use

The pin controller/pinmux API, as well as a general explaination of how a pin controller works, can be found in the kernel documentation here: https://www.kernel.org/doc/html/latest/driver-api/pin-control.html (ah, if every component had a piece of docs like this...)

Pin description

There are two ways in whicn pins are described in the downstream kernel (arch/arm/mach-{codename}/{codename}_pinmux.c):

  • using PIN_CFG and PIN_BSC_CFG, as seen in rhea.
  • using a custom PIN_DESC shorthand, as seen in hawaii/java; this wraps around PIN_CFG.

Pins

There two types of pins: standard and I2C (BSC). BCM218XX driver in mainline also has a HDMI pin type.

Functions

Each pin can have 4 (BCM28155) or 6 (BCM2166x) alternative functions. The names (and thus numbers) for these are defined separately in the downstream drivers. They cover a lot more cases than just the base pins, including things like every GPIO. (This is a fairly standard pin muxing setup.)

The currently selected function is saved to the pinsel register, which represents the currently selected function in 3 bits. Which bit belongs to which function is described in arch/arm/mach-{codename}/{codename}_pinmux.c.