dissonant.dev wiki

Mainline:Broadcom Kona/Timers: Difference between revisions

← Older edit
VisualWikitext
No edit summary
reorder STCS table
 
(2 intermediate revisions by the same user not shown)
Line 62: Line 62:
** Write the timer match bit for the selected channel (bits 3..0)
** Write the timer match bit for the selected channel (bits 3..0)
** Write the compare enable bit for the selected channel (bits 7..4)
** Write the compare enable bit for the selected channel (bits 7..4)


== Local tick timer ==
== Local tick timer ==
Line 79: Line 78:
!Description
!Description
|-
|-
| <code>STCS_TIMER_MATCH</code>
| Reserved
| 3:0
| 31:16
| Represents the state of the timer interrupt for each channel; <code>0</code> means the interrupt is enabled, <code>1</code> means the interrupt is cleared.<br><br>To clean the interrupt, clean the entire field and set the bit corresponding to the channel to clear the interrupt for to <code>1</code>.
| Reserved
|-
|-
| <code>STCS_COMPARE_ENABLE</code>
| <code>STCM{0,3}_SYNC</code>
| 7:4
| 15:12
| Enable compare (match) on the specified channel(s). When this bit is set for a channel, the value of the STCM{0,3} register will be used for a match.<br><br>- <code>0b0001</code> - enable compare for channel 0<br>- <code>0b0010</code> - enable compare for channel 1<br>- <code>0b0100</code> - enable compare for channel 2<br>- <code>0b1000</code> - enable compare for channel 3
| Sync bit for STCM{0,3} value being set (bit 12 is STCM0, bit 13 is STCM1, bit 14 is STCM2, bit 15 is STCM3).
|-
|-
| <code>STCS_COMPARE_ENABLE_SYNC</code>
| <code>STCS_COMPARE_ENABLE_SYNC</code>
Line 91: Line 90:
| Sync bit for COMPARE_ENABLE. Same layout as the above.
| Sync bit for COMPARE_ENABLE. Same layout as the above.
|-
|-
| <code>STCM{0,3}_SYNC</code>
| <code>STCS_COMPARE_ENABLE</code>
| 15:12
| 7:4
| Sync bit for STCM{0,3} value being set (bit 12 is STCM0, bit 13 is STCM1, bit 14 is STCM2, bit 15 is STCM3).
| Enable compare (match) on the specified channel(s). When this bit is set for a channel, the value of the STCM{0,3} register will be used for a match.<br><br>- <code>0b0001</code> - enable compare for channel 0<br>- <code>0b0010</code> - enable compare for channel 1<br>- <code>0b0100</code> - enable compare for channel 2<br>- <code>0b1000</code> - enable compare for channel 3
|-
|-
| Reserved
| <code>STCS_TIMER_MATCH</code>
| 31:16
| 3:0
| Reserved
| Represents the state of the timer interrupt for each channel; <code>0</code> means the interrupt is enabled, <code>1</code> means the interrupt is cleared.<br><br>To clean the interrupt, clean the entire field and set the bit corresponding to the channel to clear the interrupt for to <code>1</code>. {{Speculation|Leaving the other bits set to 0 while setting will keep the interrupt state intact (TODO - if not, then this means only one interrupt can be serviced at a time?)}}
|}
|}


Line 139: Line 138:
| <code>STCM{0,3}</code>
| <code>STCM{0,3}</code>
| 31:0
| 31:0
| 32-bit time value for timer match. When the counter matches this value, the interrupt for the channel is raised and the bit corresponding to the triggered timer number is set in STCS_TIMER_MATCH.
| 32-bit time value for timer match. When the lower bits of the counter match this value, the interrupt for the channel is raised and the bit corresponding to the triggered timer number is set in STCS_TIMER_MATCH.
|}
|}


Retrieved from "https://wiki.dissonant.dev/wiki/Mainline:Broadcom_Kona/Timers"